1. Field of the Invention
The present invention relates to a fan speed control device, and more particularly, to a control device controlling the fan to operate at a minimum speed when an apparatus equipped with the fan is being powered on.
2. Description of Related Art
Along with the technology development, notebook computers or desk-top computes, which are capable of providing various function, such as, word processing, webpage browsing, instant communication, and the like, have become one of indispensable tools in our lives. The computer generates heat when it operates. To prevent the heat from affecting the operating performance of the computer, a fan is usually mounted within a chassis or above a central processing unit of the computer to dissipating the heat.
The fan is conventionally designed according to a worst case, i.e., if operated at its maximum speed, the fan must have the capacity to maintain the temperature of an electronic device within a safe temperature range. FIG. 1 illustrates a partial circuit diagram of a conventional fan speed control device. Referring to FIG. 1, in recent years, a main control chip, also known as a baseboard management control 110, has been embedded in the baseboard by many manufacturers to manage the operation of a monitor system in the computer chassis. The baseboard management control 110 is electrically coupled to a number of sensors in the chassis to receive various sensed information including, voltage and temperature of the central processing unit, environment temperature, fan speed, and the like. Thus, the baseboard management control 110 controls the duty cycle of a pulse width modulation signal FAN_PWM, based on the sensed information, and thereby controls the speed of the fan 120.
In general, an external circuit of the baseboard management control 110 includes a buffer 130, and the buffer 130 is usually implemented as an open drain complementary metal-oxide semiconductor (CMOS). At the power-on moment of the computer, the baseboard management control 110 may have not been supplied with power yet or the pulse width modulation signal FAN_PWM may have not been enabled. In this case, an output of the buffer 130 may provide a signal having a logic high level (i.e., power source voltage Vcc) to control the fan 120 to operate at its maximum speed. Following a period after the computer power-on, the pulse width modulation signal FAN_PWM is enabled to control the speed of the fan 120 with its duty cycle.
However, a plurality of fans may be disposed within the computer chassis, and at the power-on moment, many elements in the computer may operate at their maximum speeds. If these fans operate at full speed at the power-on moment, a computer system crash is very likely to occur due to a transient power output shortage of the power supply.